pic.h

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#ifndef _PIC_H
#define _PIC_H
 
#include "port_io.h"
#include <stdint.h>
#define PIC1            0x20            /* IO base address for master PIC */
#define PIC2            0xA0            /* IO base address for slave PIC */
#define PIC1_COMMAND    PIC1
#define PIC1_DATA       (PIC1+1)
#define PIC2_COMMAND    PIC2
#define PIC2_DATA       (PIC2+1)
 
#define PIC_EOI         0x20            /* End-of-interrupt command code */
 
// ICW stands for Initialization Command Words
// Initializing PIC goes from ICW1 -> ICW4 (if it is present, which is indicated by byte 0 during ICW1)
// From wiki.osdev.org: "This command (ICW1) makes the PIC wait for 3 extra "initialisation words" on the data port."
// ICW1: Start initialization
// ICW2: Vector offset
// ICW3: Wiring (Master/slave relationship)
// ICW4: Mode
#define ICW1_ICW4       0x01            /* Indicates that ICW4 will be present */
#define ICW1_SINGLE     0x02            /* Single (cascade) mode */
#define ICW1_INTERVAL4  0x04            /* Call address interval 4 (8) */
#define ICW1_LEVEL      0x08            /* Level triggered (edge) mode */
#define ICW1_INIT       0x10            /* Initialization - required! */
 
#define ICW4_8086       0x01            /* 8086/88 (MCS-80/85) mode */
#define ICW4_AUTO       0x02            /* Auto (normal) EOI */
#define ICW4_BUF_SLAVE  0x08            /* Buffered mode/slave */
#define ICW4_BUF_MASTER 0x0C            /* Buffered mode/master */
#define ICW4_SFNM       0x10            /* Special fully nested (not) */
 
#define PIC_MASTER_IRQ_OFFSET 0x20
#define PIC_SLAVE_IRQ_OFFSET 0x28
 
#define CASCADE_IRQ 2
 
static inline void PIC_sendEOI(uint8_t irq) {
        if(irq >= 8)
                outb(PIC2_COMMAND,PIC_EOI);
        outb(PIC1_COMMAND,PIC_EOI);
}
 
void PIC_init();
void PIC_remap(int offset1, int offset2);
void PIC_unmask(void);
void PIC_mask(void);
 
void PIC_set_mask(uint8_t IRQline);
void PIC_clear_mask(uint8_t IRQline);
#endif